| CONFORMANCE |
ANSI/IEEE 1014-1987 VMEbus specification. VXIC specification, Rev1.4. |
| DEVICE TYPE |
Register-based slave: A16:D16:D08(EO). |
| PACKAGING |
Single-width, C-size VXI module. |
| INPUTS |
- One common reference input (T16)
- Sixteen individual event inputs (T0-T15)
- One external input (GATE) enables event channels
- Two inputs (AUX) support custom control logic
- One clock I/O (CLK).
|
| INPUT LEVELS |
- The thresholds of the event inputs are adjustable as a group in the range +-2.5 V. Their impedance (high-Z or 50 ohms) and polarity (rising or falling edge) can also be selected individually.
- The GATE input has a separate threshold level adjustment. Its impedance (high-Z or 50 ohms) and polarity (high or low) are also selectable.
- The AUX inputs are TTL-compatible.
|
| OUTPUTS |
AUX1 normally indicates module armed and ready to accept an event. |
| RESOLUTION |
48.828125ps, equivalent to 20.48 GHz clock. |
| RANGE |
- 48 bits (+-6871 seconds) for bipolar mode.
|
| JITTER |
Less than (75ps + 2 E-9 x measured time) RMS. |
| LINEARITY |
+-0.25 LSB |
| TIMEBASE |
Internal ovenized oscillator. Accuracy is 0.01ppm/deg C; aging less than 1ppm/year. Internal phase-lock loop allows utilization of an external 10 MHz timebase. |
| INDICATORS |
LEDs indicate VME access and acquisition/readout mode status. |
| CONNECTORS |
Standard: SMB; Optional: LEMO |